Question

Understanding mfence for atomic ops

Asked by: SimonHowald

Here I am attaching sample code to understand the mfence. What is the best place mfence should be put in asm code. I went thru to Intel docs but it was not enough clear for me. Can anyone explain. How mfence should be used to work in multi cpu and  multicore system.

int         linux_decrement(int* my_value)             
{
asm  volatile ( "mfence \n" 
                       "lock xadd %0, %1 \n"
                       "mfence \n"
                       "sub $1, %0 \n"
                        : "+r" (ret)
                        : "m" (*my_val)
                        : "memory");
   return ret;
}

                                  
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Asked On
2009-02-26 at 15:56:51ID24182218
Tags

C

,

Atomic

,

mfence

,

assembly

Topics

Assembly Programming Language

,

C Programming Language

,

Embedded Hardware

Participating Experts
1
Points
500
Comments
1

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Answers

 

by: Sandra-24Posted on 2009-03-09 at 20:40:53ID: 23843463

The lock prefix acts as a full memory barrier. You don't actually need mfence, see the answer Chris M. Thomasson gave here:

http://groups.google.com/group/comp.programming.threads/browse_thread/thread/8931f6ece032d2d1

20120131-EE-VQP-002

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