This difference in access speeds is the precise reason why there's a memory hierarchy consisting of for example :
the CPU registers
the L1 cache
the L2 cache
the main memory (RAM)
the virtual memory (on hard disk)
getting slower towards the bottom of the list, but also less expensive (fast memory costs money) and bigger (because it's cheaper).
Getting the right data in the right location at the right time is a very complex subject, but when done right, the speed-up of your code can be huge (because it has to wait less for data).
Main Topics
Browse All Topics
by: alefzeroPosted on 2009-09-09 at 13:58:41ID: 25295485
Well, because the memory runs slower than the CPU, duh? And the memory is a "peripheral" to the CPU, so it has to actually process the read/write request, which takes some time. That's what all the memory latencies are about.
In modern Intel CPUs, the memory runs about two, three, even four times slower than the CPU itself. And added to that it actually takes several memory cycles (around twenty, actually) to process a random access read request.
The registers, on the other hand, are already "in the CPU" (let's forget for now about all the nuances of RISC architecture, register assignment and renaming etc...), so they "run" as quickly as the CPU - because they are the CPU. So a register operand does not slow the procesor pipeline (let's forget again, now about the various stall conditions in superscalar architecture, like read-after-write etc)