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September 8, 2008 09:56am pdt
 
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Passing shell arguments to makefile through make command

Tags: makefile, arguments, passing
Hello,

I'd like to be able to pass an argument from the 'make' command to a variable contained in the makefile.  I understand that there are alternatives (such as hard-coding) but I have an explicit requirement to take a variable from the shell, supplied on the command line, and using that data in the make file.

For instance:

# make test testfile1.txt

and having a section such as:
test:
       ./program %1

where %1 is an argument pointing to testfile1.txt

Is there a way to do this?

Thanks in advance!
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Question Stats
Zone: Programming
Question Asked By: jchristn123
Solution Provided By: amit_g
Participating Experts: 1
Solution Grade: A
Views: 103
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[+][-]Accepted Solution by amit_g

Rank: Guru

Accepted Solution by amit_g:

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