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libin_vFlag for India

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What is the significance of Stack Alignment?

What is significance of Stack Alignment, when compared to Data Alignment(Word Aligned/Word Addressable memory)?

In case of Data Alignment, I can relate it to a problem (code snippet attached) and provide a solution. But for stack alignment, I really don't understand the use & problems involved?

I would be grateful, if someone could help me understand:
1. Why we need stack alignment?
2. What problem could arise? (After this tell me try, to find a solution to the problem using Stack Alignment concept)
/* Unaligned Structure */
struct foo
{
	char a;
	int b;
}
 
/* Aligned Structure */
struct bar
{
	int x;
	char y;
}

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R_Janssen
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integers, booleans, word, dwords etc are all types that consist of a static number of bytes. chars, strings etc are variable in width and thus should always be placed at the end instead of the beginning on a structure.
 
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Stack alignment, just like other alignment, mainly exists for performance reasons. If the underlying hardware deals better (or in some cases only) with data that is aligned on certain byte boundaries (for example 2-byte, 4-byte, 8-byte, ... boundaries) for certain operations, then aligning the data on those boundaries increases performance or is even required in certain cases. This is also true for the stack.

Most compilers have options to control (or disable of required) stack alignment.
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Anthony2000
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ASKER

Thank you all for the responses.

If I understood rght, there is a different way of access for Data in the Memory, and a different way of access data on the stack. But I thought and still belive that Stack is also on the Memory, so why is there 2 rule for accessing 2 different parts of the memory.

It is possible to explai the problem with an example? May be you would use the following case:
On i586 and ARM (32-bit Machines)  Procedure Call Standard mentions that Stacks are 8-Byte Aligned. This means that Data has to 4-Byte aligned in case ARM since ARM requires Aligned Data, and on the stack, it requires data to be 8-Byte aligned.... I didn't understand this...?
http://www.fftw.org/doc/Stack-alignment-on-x86.html
http://www.arm.com/support/faqdev/14269.html
Stacks are used for a different purpose than the rest of the memory. They contain the different function call frames. So certain hardware might have different alignment requirements for the stack. It all depends on the system though
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ASKER

Hi Infinity08,

Could please elaborate as to how does storing function call frames on the stack, require a different alignment requirement, ie. how can the system in consideration take this fact and optimize?
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For example, the ARM architecture you mentioned requires the stack to be word (4 byte) aligned at all times. And on top of that, for public interfaces, the stack has to be 8-byte aligned.
Are you fully clear on the significance of stack alignment? And why you must make sure that your block of memory and the actual stack pointer must both be positioned/initialied appropriately?
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ASKER

Not yet Anthony.... not clear at all
>> Not yet Anthony.... not clear at all

Then you don't have to close the question. You can just ask for clarification where needed. You can ask to get the question re-opened by clicking the "Request Attention" link.
Can you explain what your confusion is? Do you understand the purpose of the stack? Do you understand the how a high level language such as "C" deals with stack alignment?

/* Unaligned Structure */  might look like is it not aligned, but the compiler will make sure it is aligned by adding padding characters. Try an experiment using sizeof of operator. You would probably be surprised to find that the sizeof of struct foo would probably be 8 bytes instead of 5 (assuming an 32-bit machine architecture). This way the variable b will be aligned on a 32-bit boundary.
struct foo
{
        char a;
        int b;
}
 
/* Aligned Structure */
struct bar
{
        int x;
        char y;
}

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Avatar of libin_v

ASKER

Hi Anthony,

>> might look like is it not aligned, but the compiler will make sure it is aligned by adding padding characters. Try an >> experiment using sizeof of operator. You would probably be surprised to find that the sizeof of struct foo would
>> probably be 8 bytes instead of 5 (assuming an 32-bit machine architecture). This way the variable b will be aligned >> on a 32-bit boundary.

Some compiler don't pad implicitly, unless you pass a pragma to align they align and even worse is some compilers don't pad at all, it is left to the developer to make sure the padding is done. I understand Data Alignment in the memory.

>> Do you understand the purpose of the stack? Do you understand the how a high level language such as "C" deals >> with stack alignment?
Stacks are used
1. to pass arguments to a function
2. back up registers, hence te registers can be used in the calling function
3. To allocate local variables
4. Reload registers during exit

Correct me if I am wrong,
1. Stack is used to store data
2. Stack is a part of the memory
3. Memory needs Data Alignment ( 4-Byte in ARM )

What is the need of another set of alignment rule ( 8-Byte ) Stack which is the also going to be accessed just like any other part of the memory?

Or

This stack alignment makes sense if there a different way of accessing the Stack . If yes, would be please enlighten me with the instruct used to access Stack and how different it is from accessing the normal memory
On some architectures the stack pointer also holds the return address from a call statement (i.e. function call). So its use is implicit here.

BTW: I can not remember using a compiler that did not pad in some way. I know in assembler I have run into data alignment problems (due to my own negligence). I am not trying to say that you are wrong, its just that one of the reasons for using a high level language is the abstraction from the true hardware.


Before I continue, what exactly do you mean by stack alignment? Is it as simple as defining a label in memory and making sure that the label is on a 4 bytes boundary (assuming a 32-bit architecture)?

I ask because the stack are it self does not have to live on a fixed boundary. It is really the stack pointer that must start on a fixed boundary. And because the pointer must start on a fixed boundary, then it makes sense to make sure the label used to mark the beginning of the stack also be on an aligned boundary. Are you starting to get the picture? Maybe this is where the confusion is?
Also note that again on some architectures. Instructions like push, pop, call, etc rely on the stack pointer register to be pointing to an aligned address. Otherwise you will experience an exception error.  I don't think all architecture behave this way. There may be some that it doe not matter. Have you tried to set the stack memory and hence the stack pointer on an odd boundary? Sometimes the best way to learn is to write an example program. If I have some time, I would like to write a program in assembly for the PC and see what happens if I alter the stack pointer.
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ASKER

Hi Anthony,

>> It is really the stack pointer that must start on a fixed boundary. And because the pointer must start on a fixed boundary, then it makes sense to make sure the label used to mark the beginning of the stack also be on an aligned boundary. Are you starting to get the picture?

Yes, the Stack Pointer has to be aligned to a fixed boundary. What I don't understand is in ARM http://www.arm.com/support/faqdev/14269.html this alignment is 8-Bytes instead of 4. My Question is more particular about the number "8"... Why cannot the Stack Pointer be 4-Byte Aligned in this Architecture?
>> My Question is more particular about the number "8"... Why cannot the Stack Pointer be 4-Byte Aligned in this Architecture?

The reason is that having it aligned on 8 byte boundaries either allows the hardware to process it a lot faster, or because it is a strict requirement of the hardware (ie. it can't function correctly if the data is not 8 byte aligned).

In this case, one of the reasons is that the LDRD and STRD instructions will not work if the stack is not 8 byte aligned. So, that's a pretty good reason to keep them 8 byte aligned, isn't it ;)
Note that the LDRD and STRD instructions are very handy (especially when it comes to performance), since they can load/store 2 registers at a time. If the stack is not 8 byte aligned, this is not possible.
If you want to award points differently (ie. give some or all to Anthony2000 for example) and/or want to change the grade, then you can ask to get this question re-opened by clicking the "Request Attention" link.