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vikaj

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sdram--speed improvement

how can sdram improve access time as well as speed
over edoram if
the main board speed remain same.is it because of
synchronization with the system clock thereby eliminating
wait time?
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ryans

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vikaj

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dear ryans,
         your reply is quite satisfactory yet i shall not get satisfied unless you
provide me with more info. what you actually mean by 'different data paths?"
what type of addressing mode is used with sdram and how this is different from
that of edoram.
"different data paths"
SDRAM is "wider" meaning that the "bus" connection is much wider, in turn more data can be transfered/handled per clock cycle.

"addressing mode"
SDRAM-12/9/2 Addressing (Row/Column/Bank)
EDORAM-Sorry I don't know this off hand.. (I think 12/8/0?)


More Info.......
EDO DRAM: This DRAM has a two-stage pipeline, which lets the memory controller read data off the chip while it is being reset for the next operation. While similar in performance to synchronous DRAM (SDRAM), it cannot support bus speeds above 66MHz.

SDRAM: This type of DRAM is designed to deliver bursts of data at very high speeds using a synchronous, or clocked, interface. SDRAM can support bus speeds of up to 100MHz today and will probably support bus speeds of up to 200MHz in the future.