haima
asked on
VC++ question: building using only OBJ files
Hi,
How can I build an application using only the needed OBJ files (no sources) when the makefiles are generated using VC++? The problem is that NMAKE looks for the CPP files for depenedencies. I want to do this with minimal changes to the makefile...
How can I build an application using only the needed OBJ files (no sources) when the makefiles are generated using VC++? The problem is that NMAKE looks for the CPP files for depenedencies. I want to do this with minimal changes to the makefile...
Try something like that :)
link /out:result.exe obj1.obj obj2.obj ... objN.obj
check more options of the link.exe ... it placed at ...\DevStudio\vc\bin... You can run ..\devstudio\vc\bin\vcvars
You can get help on link.exe by typing "link.exe | more"
Good luck
link /out:result.exe obj1.obj obj2.obj ... objN.obj
check more options of the link.exe ... it placed at ...\DevStudio\vc\bin... You can run ..\devstudio\vc\bin\vcvars
You can get help on link.exe by typing "link.exe | more"
Good luck
ASKER
Ah... but that I already knew...
I want to do the build using the original makefiles (with possibly changes that can be obtained from a script...) so that maintainance will be minimal. In this way I will have to update the Obj list every time, not to mention the libs used and various linker options...
I want to do the build using the original makefiles (with possibly changes that can be obtained from a script...) so that maintainance will be minimal. In this way I will have to update the Obj list every time, not to mention the libs used and various linker options...
Here's an idea: I don't even know if this is possible...
Alter the make file to check for a cmd line param named "LINKONLY" and have it skip the compilation step if this is set.
Alter the make file to check for a cmd line param named "LINKONLY" and have it skip the compilation step if this is set.
Don't you just need to create a new rule for the obj's.
You have to edit the makefile in some way. You could do some creative script/batch file programming to utilize environment variables and such. But I can not be more specific without know more about what you are trying to do. You indicate that the number of obj's will change? Use an environment variable, like obj_files_to_link, to indicate the obj's to be linked and have the make file use a line like "$(link_path)\$(linker) $(link_options) $(obj_files_to_link) where link_path is the path to your linker, linker is the link executable, link_options are the options desired.
You have to edit the makefile in some way. You could do some creative script/batch file programming to utilize environment variables and such. But I can not be more specific without know more about what you are trying to do. You indicate that the number of obj's will change? Use an environment variable, like obj_files_to_link, to indicate the obj's to be linked and have the make file use a line like "$(link_path)\$(linker) $(link_options) $(obj_files_to_link) where link_path is the path to your linker, linker is the link executable, link_options are the options desired.
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ASKER
Well I guess this will work (I kinda thought of it myself) but it is a little complicated... I was kind of hoping for a simpler solution (maybe a flag for nmake that can be used smartly to produce this effect and such...)
Yeah, well you might have gotten an actual solution from me but instead you hastily accepted a hack. As long as it works for you. Good Luck.
ASKER