microlit
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Why is DOS slow on a Pentium?
My workhorse PC is a 486DX2-66 with h/w disk cache running DRDOS6. I program in MS "QuickBasic" (compiled) for DOS and for a 486 my PC is very fast. I also have a P100 laptop (Toshiba 210CS). In DOS this is much slower than the 486. I think any instruction that writes to the text screen slows a program down.
Worse I now find that some (if not all) Pentiums have a more sinsiter speed problem. I have written a QuickBasic front end controlling an interrupt-driven serial-port driver written in assembler. Works fine on my 486. On some Pentiums (e.g. a 166MHz) it misses great chunks of date e.g. incoming on COM1 at 9600 baud - often over 20 bytes in succession, so cant be solved by invoking 16550 16-byte buffer. This makes my software unusable on Pentiums. Does anyone know why this is?
Surely the 166MHz P cannot be inherently slower than a 486? It can't be anything simply if it affects an interrupt routine. Is it some goblin put into modern BIOS's that aartificially slow down DOS software in an attempt to kill it dead?
Worse I now find that some (if not all) Pentiums have a more sinsiter speed problem. I have written a QuickBasic front end controlling an interrupt-driven serial-port driver written in assembler. Works fine on my 486. On some Pentiums (e.g. a 166MHz) it misses great chunks of date e.g. incoming on COM1 at 9600 baud - often over 20 bytes in succession, so cant be solved by invoking 16550 16-byte buffer. This makes my software unusable on Pentiums. Does anyone know why this is?
Surely the 166MHz P cannot be inherently slower than a 486? It can't be anything simply if it affects an interrupt routine. Is it some goblin put into modern BIOS's that aartificially slow down DOS software in an attempt to kill it dead?
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having uploaded some stuff from Intel, and searched around their site, I regret I can find no info explaining my problem.
Intel do claim all thier chips are fully backward compatible as surely they must be.
I repeat, what I am bugging about is a GROSS reduction in speed that cannot I think be because a P is optimised for something else. We are talking about a P166 going an estimated 10x slower than a 486-66.
Intel do claim all thier chips are fully backward compatible as surely they must be.
I repeat, what I am bugging about is a GROSS reduction in speed that cannot I think be because a P is optimised for something else. We are talking about a P166 going an estimated 10x slower than a 486-66.
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