Hi, not sure if this is the best place to ask, but anyway, my problem is this:
We are trying to build a scalable piece of hardware, each hardware element consisting of some logic (likely a VertexII pro or two), memory, maybe a disk, etc. This hardware connects up and implements a scientific algorithm (ideally execution time will be proportional to number of elements), the details of which are unimportant. As a starting point, this parallel computer will consist of perhaps 20 elements. Now the simulations this computer runs relies heavily of the generation of 'good' random numbers.
My first task in this project (for my thesis) is to investigate the implementation of these random number generators. They will be hardware based, and must be fast. One of the identified obstacles is that the numbers generated in one bit of hardware must not be correlated with numbers generated in another bit of hardware. It is not sufficient to seed each random number generator with a different number (they will use the same sequence). For this reason, I am thinking about designing a pure random number generator (not pseudo).
Can anyone point me in the direction of papers, etc discussing the design of such hardware? Can anyone think of other ways around my problem (parallel generation of many uncorrelated bits of hardware from separate pieces of 'identical' hardware?
Thanks in advance for the input.