aishwaria
asked on
About Makefile
I have to include certain library paths only is a particular condition is true.
for example,
i need to include file.h,
INCLUDE_HEADER = file1.h file.h
only if s=1
otherwise
i need only INCLUDE_HEADER = file1.h
How can i test this condition in a Makefile.
for example,
i need to include file.h,
INCLUDE_HEADER = file1.h file.h
only if s=1
otherwise
i need only INCLUDE_HEADER = file1.h
How can i test this condition in a Makefile.
ASKER CERTIFIED SOLUTION
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ankuratvb slipped in,
anyway what i said is for GNU "make"
I don't know if that will work in microsoft environ
-/abhijit/
anyway what i said is for GNU "make"
I don't know if that will work in microsoft environ
-/abhijit/
ASKER
Can i get the s value as a command line argument
>Can i get the s value as a command line argument
I am not sure about that.
Another Option.You could write a shell script for this.
I am not sure about that.
Another Option.You could write a shell script for this.
ASKER
Can you give me some examples for this.
#!/bin/bash
S=1
SS=$1 #first command line argument
if [ $S -eq $SS ]
then
#ur makefile command here
else
#ur other makefile command here
fi
Save as:urfilename.sh
Execute as:bash urfilename.sh 2
where 2 is the value of S
S=1
SS=$1 #first command line argument
if [ $S -eq $SS ]
then
#ur makefile command here
else
#ur other makefile command here
fi
Save as:urfilename.sh
Execute as:bash urfilename.sh 2
where 2 is the value of S
ASKER
but then the makefile is executed as
make -f Makefile
So i wish if it is done something like,
make -f Makefile -d 2
where 2 is the argument
can you suggest me some way to do like this.
-aishwaria
make -f Makefile
So i wish if it is done something like,
make -f Makefile -d 2
where 2 is the argument
can you suggest me some way to do like this.
-aishwaria
Just as a sidenote , if your makefile is named "Makefile" or "makefile"
you dont need the "-f Makefile"
make by default looks for a file called "Makefile" failing which it looks for "makefile"
/abhijit/
you dont need the "-f Makefile"
make by default looks for a file called "Makefile" failing which it looks for "makefile"
/abhijit/
You could do this:
#!/bin/bash
S=1
SS=$1 #first command line argument
if [ $S -eq $SS ]
then
make -f Makefile1
else
make -f Makefile2
fi
where Makefile1 is the makefile with the first include option
and MakeFile2 is the makefile with the other option.
Hope this helps.
#!/bin/bash
S=1
SS=$1 #first command line argument
if [ $S -eq $SS ]
then
make -f Makefile1
else
make -f Makefile2
fi
where Makefile1 is the makefile with the first include option
and MakeFile2 is the makefile with the other option.
Hope this helps.
You can set some environment variables and export them.
This can be processed from inside the Makefile.
-ssnkumar
This can be processed from inside the Makefile.
-ssnkumar
from what i have gathered
using "autoconf" and "automake" sounds like a good idea but I am not good at those but if someone knows he/she can help.
/abhijit/
using "autoconf" and "automake" sounds like a good idea but I am not good at those but if someone knows he/she can help.
/abhijit/
http://www.cco.caltech.edu/cco/texinfo/make/make_8.html#SEC71