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makefile with some flags ?

Posted on 2004-09-27
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Last Modified: 2013-12-26

Hi every body ... I have a problem with my makefile
I need to have a parameter to makefile so I can ignore some lines . these lines can be in any where in the file .

Is there any way to pass this parameter which will work as flags to ignore some lines >>> Tk.
 nmake -j 16 (it can be nmake 1 mean ignore,  0 don't ignore ... as example only  )
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Question by:albusaidi
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Expert Comment

by:sunnycoder
ID: 12158308
Hi albusaidi,

Embed the lines which can be conditionally ignored in an ifdef, e.g.

#ifdef PARAM_A
...
#endif

Now in your compilation line on makefile, use -DPARAM_A to compile the lines. Removing this flag will lead to ignoring these lines during compilation

Sunnycoder
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Author Comment

by:albusaidi
ID: 12159034
Thank You Sunnycoder but you mean -DPARAM_A  or
 -PARAM_A
so my instraction will be ?
 nmake -j 16   (before)
 nmake -DPARAM_A -j 16 (new)
it is like that ???

also if I want to be by default true that means I will normally execute the make file but If i make it with parameter then will be ignored how can I do it ... TK
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Accepted Solution

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sunnycoder earned 50 total points
ID: 12159063
http://gcc.gnu.org/onlinedocs/gcc-3.4.2/gcc/Preprocessor-Options.html#Preprocessor-Options

-D name
Predefine name as a macro, with definition 1.

-D name=definition
Predefine name as a macro, with definition definition.

nmake -DPARAM_A -j 16  should work just fine

>also if I want to be by default true that means I will normally execute the make file but If i make it with parameter then will
>be ignored how can I do it
Something like
#MYOPTIONS=
MYOPTIONS='-DPARAM_A'
gcc ... $MYOPTIONS ...

Use it in as many places as you want. If you wish to disable it, all you need to do is comment the line. Something like
MYOPTIONS=
#MYOPTIONS='-DPARAM_A'
gcc ... $MYOPTIONS ...

You can also take a decision within the makefile by using the ifeq and other conditional, but I would suggest avoiding them right now

sunnycoder
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Author Comment

by:albusaidi
ID: 12159405
sorry but when I execute this code it always execute the if statement ..it is suppose  no execute that line un less I bass the parameter

      -D name=definition
      cc=gcc
1.o: 1.cpp

      @echo "compiling mmims_main with the $(CC) compiler"

      #ifdef kw
      @echo "\n\n************IN THE MIDDLE"
      
      #endif
      $(CC) -c 1.cpp
      @echo "END OF LINE MOHAMMED AL-BUSAIDI"
      
TK
0
 

Author Comment

by:albusaidi
ID: 12160709
I mean this src

MYOPTIONS=
#MYOPTIONS='-Dkw'
cc=gcc 1.o: 1.cpp

@echo "compiling 1.cpp with the $(CC) compiler"

#ifdef KW
@echo "*******IN THE IF***********"
#end f      
$(CC) $(MYOPTIONS) -c 1.cpp
make clean      
@echo "END OF SRC"
clean:
rm 1.o

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Author Comment

by:albusaidi
ID: 12166552
No one can make it more clear ....
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LVL 45

Expert Comment

by:sunnycoder
ID: 12167067
You wish to ignore lines of makefile or that of source code ?
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Author Comment

by:albusaidi
ID: 12167127
Ignore of makefile
and to test that I make echo line so when I
execute the makefile with the parameter or without always execute the echo line
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LVL 45

Expert Comment

by:sunnycoder
ID: 12167141
-D flag is used for ignoring some source code...
For your purpose, use this

http://www.gnu.org/software/make/manual/html_chapter/make_7.html#SEC79
Something like

libs_for_gcc = -lgnu
normal_libs =

foo: $(objects)
ifeq ($(CC),gcc)
        $(CC) -o foo $(objects) $(libs_for_gcc)
else
        $(CC) -o foo $(objects) $(normal_libs)
endif

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