Ameerh24
asked on
Copy memory zone
hi,
suppose I have the following instruction set of a CPU :
Operation Binary Code
NOP 0000 0000
JMP HHLL 0111 0000 – llll llll – hhhh hhhh <----(l for low, h for high)
JZ HHLL 0111 0001 – llll llll – hhhh hhhh
JC HHLL 0111 0010 – llll llll – hhhh hhhh
JMP RX0 0111 0011
ST R0,RXn 0111 10nn
LD R0,RXn 0111 11nn
ST Rn HHLL 0100 0nnn – llll llll – hhhh hhhh
LD Rn HHLL 0100 0nnn – llll llll – hhhh hhhh
MV Rn, arg# 0101 0nnn – aaaa aaaa <-------(arg# means that this is immediate addressing mode argument)
DEC Rn 0101 1nnn
INC Rn 0110 0nnn
NOT Rn 0110 1nnn
ADD Rn, Rm 100n nmmm
SUB Rn, Rm 101n nmmm
AND Rn, Rm 110n nmmm
SWP Rn, Rm 111n nmmm
MV Rn,Rm 00nn nmmm
Where the CPU has 8 registers (R0,R1,R2,...,R7) and eaxh register is 8 bit and RXn means the combination of Rn and Rn+1
(For example RX0means the combination of R0 and R1).
what is needed is to Write an assembly program to copy a memory zone starting from memory address stored in 0100h (indirect addressing mode) to another zone starting from memory address stored in 0102h (indirect addressing mode) and stops when it found the value 00h.Suppose that the zones are distinct.
Note: The program in hexadecimal code knowing that it starts from address 0200h.
so any help would be greatly appreciated
suppose I have the following instruction set of a CPU :
Operation Binary Code
NOP 0000 0000
JMP HHLL 0111 0000 – llll llll – hhhh hhhh <----(l for low, h for high)
JZ HHLL 0111 0001 – llll llll – hhhh hhhh
JC HHLL 0111 0010 – llll llll – hhhh hhhh
JMP RX0 0111 0011
ST R0,RXn 0111 10nn
LD R0,RXn 0111 11nn
ST Rn HHLL 0100 0nnn – llll llll – hhhh hhhh
LD Rn HHLL 0100 0nnn – llll llll – hhhh hhhh
MV Rn, arg# 0101 0nnn – aaaa aaaa <-------(arg# means that this is immediate addressing mode argument)
DEC Rn 0101 1nnn
INC Rn 0110 0nnn
NOT Rn 0110 1nnn
ADD Rn, Rm 100n nmmm
SUB Rn, Rm 101n nmmm
AND Rn, Rm 110n nmmm
SWP Rn, Rm 111n nmmm
MV Rn,Rm 00nn nmmm
Where the CPU has 8 registers (R0,R1,R2,...,R7) and eaxh register is 8 bit and RXn means the combination of Rn and Rn+1
(For example RX0means the combination of R0 and R1).
what is needed is to Write an assembly program to copy a memory zone starting from memory address stored in 0100h (indirect addressing mode) to another zone starting from memory address stored in 0102h (indirect addressing mode) and stops when it found the value 00h.Suppose that the zones are distinct.
Note: The program in hexadecimal code knowing that it starts from address 0200h.
so any help would be greatly appreciated
ASKER CERTIFIED SOLUTION
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ASKER
Hi PeterdLo,
first of all thank you very much because of your corrections..
You are right that I should not use AND R3,00 (because it's always resulting ZERO)..
but, The problem is that there is no compare (CMP) instruction in this CPU instuction set..(and the program must stop copying when it found the value 00h)
so I should compare the value in memory if it's equal to zero.
so what should I so??
oops..can I use AND R3,11??
so, the result will ditect if the value of R3 is zero ..
first of all thank you very much because of your corrections..
You are right that I should not use AND R3,00 (because it's always resulting ZERO)..
but, The problem is that there is no compare (CMP) instruction in this CPU instuction set..(and the program must stop copying when it found the value 00h)
so I should compare the value in memory if it's equal to zero.
so what should I so??
oops..can I use AND R3,11??
so, the result will ditect if the value of R3 is zero ..
Hi Ameerh24,
You could try ADD R3,0
Paul
You could try ADD R3,0
Paul
Hi,
Think on
AND R3,R3
as a checking for R3 to be zero.
The advantage of this test is to not destroy R3 content, just change the flag.
So, the code can be changed to
:
0100 LD R3, R0
0101 AND R3,R3
0110 JZ 1011
:
Also, a conditional jump as JZ address should be made after a boolean or arithmetic operation. A simple LD doesn't change the flags. For clarity, we use to test (AND, INC, ADD) just before the conditional jump.
Jose
Think on
AND R3,R3
as a checking for R3 to be zero.
The advantage of this test is to not destroy R3 content, just change the flag.
So, the code can be changed to
:
0100 LD R3, R0
0101 AND R3,R3
0110 JZ 1011
:
Also, a conditional jump as JZ address should be made after a boolean or arithmetic operation. A simple LD doesn't change the flags. For clarity, we use to test (AND, INC, ADD) just before the conditional jump.
Jose
SOLUTION
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Hi, Ameerh24,
Most Assembly Languages will automatically set the Z (zero flag) when it loads the byte data into the register, for example, LD R4,RX0 (load data
thru indirect pointer/address). Therefore, you do not need the Comparison instructions. Unless, your language does not have this feature.
Same thing for the incremental instruction, for example, INC R0. When its content wraps around from 0xff (decimal 255) to 0x00, the Z flag will be set to indicate the content of R0 is zero.
Otherwise, you need to follow other experts advices to test Z flag different ways.
Peter
Most Assembly Languages will automatically set the Z (zero flag) when it loads the byte data into the register, for example, LD R4,RX0 (load data
thru indirect pointer/address). Therefore, you do not need the Comparison instructions. Unless, your language does not have this feature.
Same thing for the incremental instruction, for example, INC R0. When its content wraps around from 0xff (decimal 255) to 0x00, the Z flag will be set to indicate the content of R0 is zero.
Otherwise, you need to follow other experts advices to test Z flag different ways.
Peter
Hi Ahmeer24,
As a matter of clarifying, change in the ZERO flag occurs after logical (OR, AND, XOR) and math (ADD, SUB, MUL, DIV, INC, DEC) operations.
This is an attribute of the CPU, not a feature of the assembler or language compiler.
There are no actions on the ZERO flag when the CPU run operations like LOAD, STORE and MOVE.
This applies to all the Intel family (8080, 8085, 8088, 8086, 80186, 80286, 80386, 80486 and Pentium I to 4), AMD, Zilog (Z80, Z8000), Motorola.
About INC and DEC actions on the ZERO flag, Peter is correct.
BTW the CPU in the case of current question is very primitive and seems to be a theoretical one.
The CMP A,B action is only a SUB A,B action that doesn't change the register content, only the ZERO flag if the result is zero.
Jose
As a matter of clarifying, change in the ZERO flag occurs after logical (OR, AND, XOR) and math (ADD, SUB, MUL, DIV, INC, DEC) operations.
This is an attribute of the CPU, not a feature of the assembler or language compiler.
There are no actions on the ZERO flag when the CPU run operations like LOAD, STORE and MOVE.
This applies to all the Intel family (8080, 8085, 8088, 8086, 80186, 80286, 80386, 80486 and Pentium I to 4), AMD, Zilog (Z80, Z8000), Motorola.
About INC and DEC actions on the ZERO flag, Peter is correct.
BTW the CPU in the case of current question is very primitive and seems to be a theoretical one.
The CMP A,B action is only a SUB A,B action that doesn't change the register content, only the ZERO flag if the result is zero.
Jose
Ooops, correcting:
The CMP A,B action is only a SUB A,B action that doesn't change the register content, only the ZERO flag, which will be TRUE if the result is zero and FALSE otherwise.
Jose
The CMP A,B action is only a SUB A,B action that doesn't change the register content, only the ZERO flag, which will be TRUE if the result is zero and FALSE otherwise.
Jose
ASKER
0000 LD R0 Low 0101
0001 LD R1 High 0100
0010 LD R1 Low 0103
0011 LD R2 High 0102
0100 LD R3, R0
0101 AND R3,00
0110 JZ 1011
0111 ST R2, R3
1000 INC R1
1001 INC R2
1010 JMP 0100
1011 NOP
so is that right?