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# IEEE 754 float division

Posted on 2006-07-12
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Last Modified: 2008-01-16
I want to calculate float division, like 165 / 5 = 33, using IEEE 754 32bits floats. So:

165 = 0 10000110 01001010000000000000000
5   = 0 10000001 01000000000000000000000
33  = 0 10000100 00001000000000000000000

The dividend and divisor are in 32 bits registers and I only have integer operators. I have add and sub and I implemented integer multiplication and quotient-remainder integer division.

The exponent seems to be just a subtraction. But the mantissa is more complicated.

Any ideas?
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Question by:acerola
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11 Comments

LVL 8

Expert Comment

ID: 17096672
If your are talking about x86, you need to know about fpu instructions, some info here

http://webster.cs.ucr.edu/AoA/DOS/ch14/CH14-3.html

you can use fdiv instructions
http://webster.cs.ucr.edu/AoA/DOS/ch14/CH14-4.html

regards
Manish Regmi

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LVL 1

Author Comment

ID: 17100745
It is a RISC, so I can't use any complex instruction.

I can use ADD, SUB, AND, OR, BEQ, SLI, etc. All integer instructions.

What I need is an algorithm to implement these floating point instructions.
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LVL 8

Expert Comment

ID: 17101567
ok. You cant use FPU and want to do FPU emulation.
that aint easy.

these pages can give you some info
http://www.cs.wisc.edu/~smoler/x86text/lect.notes/arith.int.html
http://www.cs.wisc.edu/~smoler/x86text/lect.notes/arith.flpt.html

regards
Manish Regmi
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LVL 1

Author Comment

ID: 17110540
That didn't help much. It explains add, sub and mult, but only small comments on division.
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LVL 9

Expert Comment

ID: 17239038
do you know how to do long division using paper and pencil? implement it in ASM. yes i see it coming. it is PITA. i had to do it once and the divisor was always fixed and known to be 18. for variable divisor it is more painful. but all you need is an algorithm right?
If you think for a while, managing fractional part is not that difficult either.
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Author Comment

ID: 17239059
Thank you, but I have already solved the problem.
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LVL 9

Expert Comment

ID: 17245506
In that case, post a request to close the question in Community Support TA: http://www.experts-exchange.com/Community_Support/askQuestion.jsp
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LVL 1

Author Comment

ID: 17247554
Well, here is the solution in MIPS assembly:

####################################################################################################

divide_ieee:

# divide dois numeros no formato IEEE 754 precisao simples
# \$a0 = dividendo
# \$a1 = divisor
# \$v0 = quociente

addi \$sp, \$sp, -4   # empilha \$ra
sw \$ra, 0(\$sp)      #
jal empilha_t       # empilha as variaveis \$t

li \$v0 0      # inicializamos o valor de retorno

# dividendo e divisor diferentes de zero?

sll \$t0 \$a0 1               # colocamos \$a0 em \$t0 sem o bit de sinal
beq \$t0 \$0 divide_ieee_fim  # retorna se o dividendo == +-0

sll \$t0 \$a1 1               # colocamos \$a1 em \$t0 sem o bit de sinal
beq \$t0 \$0 divide_ieee_fim  # retorna se o divisor == +-0

# sinal

slt \$t0 \$a0 \$0   # \$t0 = bit de sinal de \$a0
slt \$t1 \$a1 \$0   # \$t1 = bit de sinal de \$a1
xor \$t0 \$t0 \$t1  # \$t0 = bit de sinal do resultado
sll \$v0 \$t0 31   # colocamos o bit de sinal no lugar certo de \$v0

# expoente

move \$t0 \$a0     # \$t0 = \$a0
sll \$t0 \$t0 1    # desprezamos o bit de sinal
srl \$t0 \$t0 24   # desprezamos os bits da mantissa

move \$t1 \$a1     # \$t1 = \$a1
sll \$t1 \$t1 1    # desprezamos o bit de sinal
srl \$t1 \$t1 24   # desprezamos os bits da mantissa

addi \$t1 \$t1 -127 # tiramos o bias do expoente
sub \$t9 \$t0 \$t1   # \$t9 = expoente do resultado, ja com o bias

# mantissa

move \$t0 \$a0     # \$t0 = dividendo
move \$t1 \$a1     # \$t1 = divisor

sll \$t0 \$t0 9    # desprezamos os bits de sinal e expoente
srl \$t0 \$t0 9
sll \$t1 \$t1 9
srl \$t1 \$t1 9

li \$t5 1                 # \$t5 = 1 bit na posicao 23, aquele
sll \$t5 \$t5 23           # que e desprezado na notacao IEEE
add \$t0 \$t0 \$t5
add \$t1 \$t1 \$t5

slt \$t2 \$t0 \$t1     # \$t2 = 1 se dividendo < divisor

sub \$t9 \$t9 \$t2     # se dividendo < divisor, o resultado vai ser < zero
# para normalizar temos que fazer um shift
# logo, atualizamos o expoente

addi \$t2 24         # \$t2 = 25 se dividendo < divisor. 24 caso contrario
# esse e o numero de passos que queremos fazer
# durante a divisao

li \$t3 0            # \$t3 = quociente = 0

# houve underflow?

slt \$t8 \$t9 \$0

bne \$t8 \$0 divide_ieee_fim

divide_ieee_loop:

# \$t0 = dividendo
# \$t1 = divisor
# \$t2 = contador do loop (regressivo)
# \$t3 = quociente

beq \$t2 \$0 divide_ieee_fim_loop        # while \$t2 <> 0
addi \$t2 \$t2 -1                        # \$t2--

slt \$t4 \$t0 \$t1                        # \$t4 = 1 se dividendo < divisor
beq \$t4 \$0 divide_ieee_pode_dividir    # dividendo >= divisor (podemos dividir)
j divide_ieee_nao_pode_dividir         # dividendo < divisor (nao podemos dividir)

divide_ieee_pode_dividir:

sll \$t3 \$t3 1                    # shift no quociente
addi \$t3 \$t3 1                   # colocamos 1 no quociente

sub \$t0 \$t0 \$t1                  # tiramos 1*divisor do dividendo

sll \$t0 \$t0 1                    # shift no dividendo

j divide_ieee_loop               # proximo passo

divide_ieee_nao_pode_dividir:

sll \$t3 \$t3 1                    # shift no quociente
# colocamos 0 no quociente

# tiramos 0*divisor do dividendo

sll \$t0 \$t0 1                    # shift no dividendo

j divide_ieee_loop               # proximo passo

divide_ieee_fim_loop:

sll \$t9 \$t9 23    # colocamos o expoente no lugar certo de \$v0
add \$v0 \$v0 \$t9

sub \$t3 \$t3 \$t5   # tiramos o bit extra

add \$v0 \$v0 \$t3   # colocamos o quociente no lugar da mantissa

divide_ieee_fim:

jal desempilha_t    # desempilha as variaveis \$t
lw \$ra, 0(\$sp)      # desempilha \$ra
addi \$sp, \$sp, 4    #

jr \$ra

####################################################################################################
0

LVL 1

Author Comment

ID: 17247561
These stack functions are also needed:

####################################################################################################

empilha_t:

# empilha as vairavis \$t0 ate \$t9

addi \$sp, \$sp, -40
sw \$t0, 0(\$sp)
sw \$t1, 4(\$sp)
sw \$t2, 8(\$sp)
sw \$t3, 12(\$sp)
sw \$t4, 16(\$sp)
sw \$t5, 20(\$sp)
sw \$t6, 24(\$sp)
sw \$t7, 28(\$sp)
sw \$t8, 32(\$sp)
sw \$t9, 36(\$sp)

jr \$ra

####################################################################################################

desempilha_t:

# desempilha as vairavis \$t0 ate \$t9

lw \$t0, 0(\$sp)
lw \$t1, 4(\$sp)
lw \$t2, 8(\$sp)
lw \$t3, 12(\$sp)
lw \$t4, 16(\$sp)
lw \$t5, 20(\$sp)
lw \$t6, 24(\$sp)
lw \$t7, 28(\$sp)
lw \$t8, 32(\$sp)
lw \$t9, 36(\$sp)
addi \$sp, \$sp, 40

jr \$ra

####################################################################################################
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Accepted Solution

ee_ai_construct earned 0 total points
ID: 17263020
Closed, 50 points refunded.
ee_ai_construct
Community Support Moderator
replacement part #xm34
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