troubleshooting Question

Multiple Definition in build process

Avatar of goloap
goloap asked on
C
15 Comments1 Solution876 ViewsLast Modified:
Hi,

I'm having a strange problem with a makefile. I have multiple files that include a .h file which includes another .h file. During compilation, each c file is compiled separately using the "-c" flag. Even so, i get a multiple definition of all the function defined in the second .h file during linking. This is the structure of the program:

foo.h
#ifndef _foo_
#define _foo_

<some variable declaration>
#include "bar.h"

#endif

bar.h
#ifndef _bar_
#define _bar_

<some definition of inline functions>
#endif

c1.c
#include foo.h
<stuff>

c2.c
#include foo.h
<stuff>

I don't get why it shouldn't work since it works fine when compiling with Visual C 8, but I want to use GCC to compile it now and it won't work.

Any help would be appreciated.
ASKER CERTIFIED SOLUTION
fli1103

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