Implementing HyperTransport protocol on FPGAs

I would like to know how to implement HyperTransport protocol on FPGA architecture (VHDL). Any implementation guidelines (any sort of resource) will be beneficial.

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HyperTransport Protocol Architecture:,2845,1154814,00.asp

HyperTransport Technology I/O Link White paper pdf file:

HyperTransport consortium site:

A HyperTransport Tunnel controller written in SystemC:

Implementing a HyperTransport protocol version 1.10 pdf file:

HyperTransport (HT) MegaCore Function for Altera FPGA:


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