Structuring an Application Programming Interface

Posted on 2008-11-15
Last Modified: 2012-05-05
Trying to put together an Application Programming Interface given the following:

Communication Protocol:
General Purpose IO (GPIO)
Discrete Inputs

Now Ethernet and GPIO could be classified as 'Debug' aids/functionality - if you will.

So I have a Subject and four Listeners.  Subject and Listener act as -users if you will of the abovementioned protocols.  
  GPIO,  Enet (Debugging Aids)
  GPIO,  Enet (Debugging Aids)

Lastly, the code executes in two environments... Real Hardware (memory is mapped to FPGA addresses) or Simulation (using PC memory).  This leads me to:


How could I structure this in real source?  Seems like the potential for a host of inheritance looms large.    If you could structure this using example source that would be great.  i.e
      class Base {};  class Derived : public Base {} ;
Except use the names given above.

Question by:forums_mp
    LVL 39

    Accepted Solution

    >>>> So I have a Subject and four Listeners.
    Normally you call it Server and Clients.

    >>>> How could I structure this in real source?
    You have to decide if you really want to make a design based on hardware or kernel protocols. Actually I never experienced such a design in the last 20 years or more. Look at Windows operation system. Since NT it has a 'hardware abstraction layer' HAL which make all services independent from hardware but put that task to special drivers. Same thing for network communication. Normal TCP/IP has 7 layers where there is rarely a need to dice deeper than layer 6. Ethernet would be at layer 2 if I remember rightly. Even a peer-to-peer connection using the Internet was not fully build up from scratch programmatically but requires a bundle of services or tools which make the application programming independent of any hardware, protocols or memory addresses. So you can test a peer-to-peer at one single local computer by only changing names and without any knowledge of any physical or system logical settings and environments.

    Author Comment

    The design will be structured around hardware protocol.  I suspect I could have two special drivers; one to talk with the memory map of the FPGA and the other to deal with PC memory (when I'm in a simulation environment .. it's PC memory).  

    Author Comment

    Come to think of it I guess the special drivers (reading your post again) would be the ethernet/GPIO etc. Correct?  Just trying to create a class diagram in my - if you will - head

    Author Comment

    I have a question for you.  Referencing the link:

    With regards to your trace class.  You said: "Tell me if you need some of these functions.", then you later alluded to the trace utility in C that you later advanced to C++.  Is it possible for you to upload both the C and C++ version to this thread?   I was tempted to start another thread surrounding a logger class.  I did a search on the site and came across the 'simple C++ Logging' thread.  

    Let me know.  Worse case I'll provide an email address where you could email source.   Lastly, I'll  increase the points

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