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SimonHowald
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Understanding mfence for atomic ops

Here I am attaching sample code to understand the mfence. What is the best place mfence should be put in asm code. I went thru to Intel docs but it was not enough clear for me. Can anyone explain. How mfence should be used to work in multi cpu and  multicore system.

int         linux_decrement(int* my_value)             
{
asm  volatile ( "mfence \n" 
                       "lock xadd %0, %1 \n"
                       "mfence \n"
                       "sub $1, %0 \n"
                        : "+r" (ret)
                        : "m" (*my_val)
                        : "memory");
   return ret;
}

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AssemblyCEmbedded Hardware

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Sandra-24

8/22/2022 - Mon
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