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12000 SIP 601 Errors

Posted on 2010-09-07
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Last Modified: 2012-05-10
Hi
I have a customer with a 12000-SIP-601 and a single SPA (SPA-1X10GE-L-V2 ), and he keeps getting the following error. The functionality does not seem to be affected, but he would like to Smartnet in the future, and I'm sure this would prevent that. Has anybody had any experience with this error? Any help is appreciated.

Thanks!

LC/0/4/CPU0::Sep  2 13:38:41.338 : gsr_lclm[162]:
%LICENSE-LCLICMGR-3-RATE_MODE_SECURITY_FAIL :          WARNING!!!The module in node 0/4/CPU0 in this router may not be a genuine Cisco product.Cisco warranties and support programs only apply to genuine Cisco products.If Cisco determines that your insertion of non-Cisco memory, WIC cards,AIM cards, Network Modules, SPA cards, GBICs or other modules into aCisco product is the cause of a support issue, Cisco may deny support underyour warranty or under a Cisco support program such as SmartNet.


SLOT  4 (RP/LC 4): Cisco 12000 Series SPA Interface Processor- 601
>> MAIN: type 149,  800-29040-03 rev A0 dev 93163
>>       HW config: 0x20    SW key: 00-00-00
>> PCA:  73-11216-03 rev A0 ver 4
>>       HW version 1.0  S/N SAD1145091M
>> MBUS: Embedded Agent
>>       Test hist: 0x00    RMA#: 00-00-00    RMA hist: 0x00
>> DIAG: Test count: 0x00000000    Test results: 0x00000000
>> FRU:  Linecard/Module: 12000-SIP-601
>>       Route Memory: MEM-LC5-2048=
>>       Packet Memory: MEM-LC5-PKT-512=
>> L3 Engine: 5 (MultiRate) - ISE OC192 (10 Gbps) Operational rate mode:
>> 10 Gbps MBUS Agent Software version 4.5 (RAM) (ROM version is 4.5)
>> Using CAN Bus A ROM Monitor version 19.0 Fabric Downloader version
>> used 6.1 (ROM version is 6.1) Primary clock is CSC1 Board State is
>> IOS-XR RUN Last Reset Reason: Initial load Insertion time: Wed Sep  1
>> 01:31:17 2010 (1d13h ago) DRAM size: 2147483648 bytes FrFab SDRAM
>> size: 268435456 bytes ToFab SDRAM size: 268435456 bytes 0 resets
>> since restart/fault forgive SPA Information:
>>       subslot 0/4/0: SPA-1X10GE-L-V2 (0x50c), status is ok
>>       subslot 0/4/1: Empty
>>       subslot 0/4/2: Empty
>>       subslot 0/4/3: Empty

RP/0/9/CPU0:CORE1.CORE#sh controllers tenGigE 0/4/0/0 phy
Thu Sep  2 17:28:47.241 EST

int Gig4/0/0:
       ID: XFP
       Extended ID: 58
       Xcvr Type: OC192 + 10GBASE-L (61)
               TX ref clock input is not required
               CDP is supported
               Power Level 1 Module (1.5W max. power dissipation)
       Connector: LC
       Vendor: CISCO-OPNEXT
       Part Number: TRF5012AN-LA000
       State: Enabled

       10 Gigabit Ethernet Compliance:
               10GBASE-LR
       10 Gigabit Fiber Channel Compliance:
               10GBASE-LR Equivalent
       10 Gigabit Copper Links:  not specified
       Lower Speed Links:  not specified
       SONET/SDH Codes - Interconnect:
               I-64.1
       SONET/SDH Codes - Short Haul:  not specified
       SONET/SDH Codes - Long Haul:  not specified
       SONET/SDH Codes - Very Long Haul:  not specified
       Encoding:
               NRZ
               SONET Scrambled
               64B/66B
       Minimum bit rate is 9900 MBits/s.
       Maximum bit rate is 11100 MBits/s.
       Standard single mode fiber supports up to 10km.
       Device Technology:
               Transmitter is not tunable.
               Detector type is PIN.
               Is uncooled transmitter.
               Is not active wavelength control.
               Transmitter technology: 1310 nm DFB
       Vendor name: CISCO-OPNEXT
       CDR support for:
               10.5 Gb/s
               10.3 Gb/s
               9.95 Gb/s
       Vendor OUI: 0x00-0x0b-0x40
       Product Identifier (PID): TRF5012AN-LA000
       Hardware Revision: 02
       Nominal laser wavelength 1310 in nm.
       Guaranteed range of laser wavelength 20 in nm.
       Maximum case temperature is 70 degrees C.
       Maximum power dissipation is 2500 mW.
       Maximum total power dissipation in power down mode is 1500 mW.
       Maximum current required by +5V supply is 0 mA.
       Maximum current required by +3.3V supply is 600 mA.
       Maximum current required by +1.8V supply is 0 mA.
       Maximum current required by -5.2V supply is 0 mA.
       Serial number: ONT1228104D
       Date code (yy/mm/dd): 08/07/07
       Diagnostic monitoring type:
       FEC BER is not supported.
       Received power measurement type is  average power.
       Primary supply voltage monitored:
       Enhanced options implemented:
               optional soft TX_DISABLE implemented
       Auxiliary 1 input type: +3.3V Supply Voltage
       Auxiliary 2 input type: Auxiliary monitoring not implemented
       Idprom contents (hex):
       0x00:   06 58 07 40 40 00 00 40 00 00 00 B0 63 6F 0A 00
       0x10:   00 00 00 40 43 49 53 43 4F 2D 4F 50 4E 45 58 54
       0x20:   20 20 20 20 E0 00 0B 40 54 52 46 35 30 31 32 41
       0x30:   4E 2D 4C 41 30 30 30 20 30 32 66 58 0F A0 46 DA
       0x40:   7D 96 06 00 4F 4E 54 31 32 32 38 31 30 34 44 20
       0x50:   20 20 20 20 30 38 30 37 30 37 20 20 08 40 70 7E
       0x60:   00 00 11 76 DD 74 CF 15 3D 0B 50 6B 80 62 7C D6
       0x70:   21 75 51 00 00 00 00 00 00 00 00 00 FF 05 1F D3
       State: Enabled

       Environmental Information - raw values
               Temperature: 9472
               Tx voltage: 0 in units of 100uVolt
               Tx bias: 53346 uA
               Tx power: -3 dBm (4478 in units of 0.1 uW)
               Rx power: 0 dBm (7212 in units of 0.1 uW)
               (AUX1) +3.3V Supply Voltage: 32771

       XFP TX is enabled.
       XFP TX is soft enabled.
       XFP is ready.
       XFP is not power down.
       XFP doesn't have interrupt(s).
       XFP is not LOS.
       XFP data is ready.
       XFP TX path is ready.
       XFP TX laser is not in fault condition.
       XFP TX path CDR is locked.
       XFP RX path is ready.
       XFP RX path CDR is locked.
       No active alarms
       No active warning

Phased Initialization
       Phase Reached: 4
       Phase Exit Code: Success 0
       Phase Read Offset: 128

Socket Verification
       Compatibility: Compatibility passed
       Security: Security passed
       General status/control Register: 0000
       Alarm status: 0005
       Warning Status: 0005

THRESHOLDS
                    high alarm  high warning    low warning     low alarm
  Temperature     C    +090.000        +085.000         -05.000         -10.000
  Voltage         V     000.0000        000.0000        000.0000        000.0000
  Bias Current   mA     130.0000        120.0000        012.0000        010.0000
  Transmit power mW     001.5848        001.0000        000.1995        000.1258
  Receive power  mW     001.2589        001.1220        000.0288        000.0181
       Diagnostics contents (hex):
       0x00:   06 00 5A 00 F6 00 55 00 FB 00 00 00 00 00 00 00
       0x10:   00 00 FD E8 13 88 EA 60 17 70 3D E8 04 EA 27 10
       0x20:   07 CB 31 2D 00 B5 2B D4 01 20 89 EE 77 E2 87 5A
       0x30:   7A 75 00 00 00 00 00 00 00 00 00 00 00 00 00 00
       0x40:   00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
       0x50:   05 00 05 00 C3 00 00 00 00 00 00 00 00 00 00 00
       0x60:   1E 00 00 00 00 94 00 00 1C 1B 80 4E 00 00 00 00
       0x70:   00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01

Link flapped at Wed Sep  1 05:39:47 2010

Link State changed to down
1.1 FPGA Address : 0x38b00204    Value : 0x12050100
1.2 FPGA Address : 0x38b00204    Value : 0x12050100
2.1 FPGA Address : 0x38b00200    Value : 0xf
2.2 FPGA Address : 0x38b00200    Value : 0x8
3.1. Serdes PCS status Register1 (0x230001): 0x      82
3.2. Serdes PCS status Register1 (0x230001): 0x      86
4.1. Serdes PCS status Register2 (0x230008): 0x    8c05
4.2. Serdes PCS status Register2 (0x230008): 0x    8005
5.1.Frequency status status Register (0x238126): 0x    8001
5.2.Frequency status status Register (0x238126): 0x    8000
6.1.10G Serdes status Register (0x238127): 0x      20
6.2.10G Serdes status Register (0x238127): 0x       0
7.1. Reg (0x238300): 0x    2301
7.2. Reg (0x238300): 0x    2301
8.1. Reg (0x23fe26): 0x    19d5
8.2. Reg (0x23fe26): 0x    99d5
9.1. PHY XGXS status 1 reg(0x240001) : 0x       2
9.2. PHY XGXS status 1 reg(0x240001) : 0x       6
10.1. PHY XGXS status 2 reg (0x240008): 0x    8c00
10.2. PHY XGXS status 2 reg (0x240008): 0x    8000
11.1.PHY XGXS Lane status reg (0x240018) : 0x    1c0f
11.2.PHY XGXS Lane status reg (0x240018) : 0x    1c0f
12.1. reg (0x248009) : 0x    1c0f
12.2. reg (0x248009) : 0x       0
13.1. reg (0x230020) : 0x    1005
13.2. reg (0x230020) : 0x    1005
14.1. reg (0x230021) : 0x    592a
14.2. reg (0x230021) : 0x    8000
15.1. reg (0x23820A) : 0x       5
15.2. reg (0x23820A) : 0x       5

Link flapped at Wed Sep  1 02:01:37 2010

Link State changed to up
1.1 FPGA Address : 0x38b00204    Value : 0x12010000
1.2 FPGA Address : 0x38b00204    Value : 0x12010000
2.1 FPGA Address : 0x38b00200    Value : 0xc
2.2 FPGA Address : 0x38b00200    Value : 0x8
3.1. Serdes PCS status Register1 (0x230001): 0x       6
3.2. Serdes PCS status Register1 (0x230001): 0x       6
4.1. Serdes PCS status Register2 (0x230008): 0x    8005
4.2. Serdes PCS status Register2 (0x230008): 0x    8005
5.1.Frequency status status Register (0x238126): 0x    8001
5.2.Frequency status status Register (0x238126): 0x    8001
6.1.10G Serdes status Register (0x238127): 0x       0
6.2.10G Serdes status Register (0x238127): 0x       0
7.1. Reg (0x238300): 0x    2301
7.2. Reg (0x238300): 0x    2301
8.1. Reg (0x23fe26): 0x    99d5
8.2. Reg (0x23fe26): 0x    99d5
9.1. PHY XGXS status 1 reg(0x240001) : 0x       6
9.2. PHY XGXS status 1 reg(0x240001) : 0x       6
10.1. PHY XGXS status 2 reg (0x240008): 0x    8000
10.2. PHY XGXS status 2 reg (0x240008): 0x    8000
11.1.PHY XGXS Lane status reg (0x240018) : 0x    1c0f
11.2.PHY XGXS Lane status reg (0x240018) : 0x    1c0f
12.1. reg (0x248009) : 0x       0
12.2. reg (0x248009) : 0x       0
13.1. reg (0x230020) : 0x    1005
13.2. reg (0x230020) : 0x    1005
14.1. reg (0x230021) : 0x    8000
14.2. reg (0x230021) : 0x    8000
15.1. reg (0x23820A) : 0x       5
15.2. reg (0x23820A) : 0x       5

Link flapped at
Link State changed to down
1.1 FPGA Address : 0x38b00204    Value : 0x0
1.2 FPGA Address : 0x38b00204    Value : 0x0
2.1 FPGA Address : 0x38b00200    Value : 0x0
2.2 FPGA Address : 0x38b00200    Value : 0x0
3.1. Serdes PCS status Register1 (0x230001): 0x       0
3.2. Serdes PCS status Register1 (0x230001): 0x       0
4.1. Serdes PCS status Register2 (0x230008): 0x       0
4.2. Serdes PCS status Register2 (0x230008): 0x       0
5.1.Frequency status status Register (0x238126): 0x       0
5.2.Frequency status status Register (0x238126): 0x       0
6.1.10G Serdes status Register (0x238127): 0x       0
6.2.10G Serdes status Register (0x238127): 0x       0
7.1. Reg (0x238300): 0x       0
7.2. Reg (0x238300): 0x       0
8.1. Reg (0x23fe26): 0x       0
8.2. Reg (0x23fe26): 0x       0
9.1. PHY XGXS status 1 reg(0x240001) : 0x       0
9.2. PHY XGXS status 1 reg(0x240001) : 0x       0
10.1. PHY XGXS status 2 reg (0x240008): 0x       0
10.2. PHY XGXS status 2 reg (0x240008): 0x       0
11.1.PHY XGXS Lane status reg (0x240018) : 0x       0
11.2.PHY XGXS Lane status reg (0x240018) : 0x       0
12.1. reg (0x248009) : 0x       0
12.2. reg (0x248009) : 0x       0
13.1. reg (0x230020) : 0x       0
13.2. reg (0x230020) : 0x       0
14.1. reg (0x230021) : 0x       0
14.2. reg (0x230021) : 0x       0
15.1. reg (0x23820A) : 0x       0
15.2. reg (0x23820A) : 0x       0




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Question by:Vardata
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3 Comments
 
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Expert Comment

by:harbor235
ID: 33624867


Are you using non Cisco memory? The error message pretty much says it all. I would get Cisco memory before smartnetting this.


harbor235 ;}
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Author Comment

by:Vardata
ID: 33640332
This card has been in a working environment for about a year now, and these errors were not present until  they upgraded their XR software. Have you ever had an experience where an upgrade caused these errors?
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LVL 32

Accepted Solution

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harbor235 earned 500 total points
ID: 33641153

No, but Cisco may have enhanced their software to look more thoroughly for non Cisco components.

I guess the question is, is the memory on the card Cisco's ? They have been more aggressive in this area because they obviously loose sales not to mention, do you really expect them to guarantee their products if you use other components?  

cost of memory <= cost of replacing card

harbor235 ;}
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