How to test AHCI's CCC(Command Completion Coalescing) feature ?

Posted on 2012-09-06
Last Modified: 2012-09-06
Dear experts,
I have one question about the testing of AHCI's CCC(Command Completion Coalescing) function...

According to AHCI spec v1.3, chapter 11:
Command Completion Coalescing (CCC) is a feature designed to reduce the interrupt and command completion overhead in a heavily loaded system. The feature enables the number of interrupts taken per completion to be reduced significantly, while ensuring a minimum quality of service for command completions.

After reading the doc I setup a testing scenario:
1. Disable CCC_CTL.EN first(to update CCC_CTL.CC field)
2. Set CCC_PORTS = 0x00000001, indicating Port0 is part of the CCC feature
3. Set CCC_CTL.CC = 5, indicating the number of command completions that are necessary to cause a CCC interrupt
4. Set CCC_CTL.EN = 1 to enable this feature
5. Issue 5 FPDMA Write Queued commands to device and observe the IS.IPS(32bits)

* Assume CCC_CTL.INT = 6, indicating when CCC interrupt occurs IS.IPS[6] will be 1

My expected results will be:
Issue 1st command to device...
After command complete IS.IPS[6] = 0
Issue 2nd command to device...
After command complete IS.IPS[6] = 0
Issue 3rd command to device...
After command complete IS.IPS[6] = 0
Issue 4th command to device...
After command complete IS.IPS[6] = 0
Issue 5th command to device...
After command complete IS.IPS[6] = 1

But finally I found IS.IPS[6] = 1 immediately after 1st command is completed...!

Is the scenario correct  ?
Question by:liaoo
    1 Comment

    Accepted Solution

    I found the reason why CCC interrupt generated immediately after 1st command completed in this scenario:

    11.4 Interrupt Definition
    The command coalescing completion interrupt, called the ‘CCC interrupt’, is generated on any of the following conditions:
    • hCccComplete is greater than or equal to the value specified by software in CCC_CTL.CC and CCC_CTL.CC != 0
    • hCccTimer is decremented to 0h. (The interrupt is generated on the decrement to 0h, not the decrement from 0h to -1.)
    • hCccComplete is incremented and there are no more commands outstanding on the selected ports for command completion coalescing and CCC_CTL.CC != 0.
    In my scenario software issues command one by one thus there is only 1 bit is "1" in PxCI[] each time...

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