Search for include for g++

I am using G++ with minGW  on Win7 with this directory structure:

test
   src -- all my .c and .cpp files
   inc -- my .h file

My make line is below and the makefile is attached:
hellomake:  $(objects)
	$(CC) -I ../inc -o  hellomake $(objects) -static]

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If I put the header into src the make works perfectly.

If I move my header to inc I get this error:

mingw32-make: *** No rule to make target 'hellomake.h', needed by 'hellomake.o'.  Stop.

Shouldn't the  -I ../inc make it look for the header in test/inc?
makefile.txt
anAppBuilderAsked:
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sarabandeCommented:
I think the problem is the following line:

$(objects) : $(headers)

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this makes the objects dependent from headers but there is no rule for .h files.

in my opinion you would get rid of the message if you remove the line.


the dependencies between cpp files and header can be made by the compiler:

SRC = src1.cpp src2.cpp 
CC  = /usr/bin/gcc
DEPENDFILE = .depend

dep: $(SRC)
        $(CC) -MM $(SRC) > $(DEPENDFILE)

-include $(DEPENDFILE)

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here, the option -MM would cause the compiler to look into all sources for #include statements. it then would add those files to .depend file. the list then would be included in the makefile (note, the - left of include command is to prevent the make utility to complain when the .depend does not exist).

Sara
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anAppBuilderAuthor Commented:
Thank you Sara.

I'm trying to take this one step at a time.  So I removed the line as you suggested, but it's still not finding the header file in ../inc.  Error:

     fatal error: hellomake.h: No such file or directory
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sarabandeCommented:
additional include folders need to be added by the -I option of the compiler or globally added by adding the absolute path to the include environment variable.

alternatively you could include the header like

#include "../inc/header.h"

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what is quite ok if inc and src directory at same folder level is your general way.

Sara
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anAppBuilderAuthor Commented:
Thank you, Sara.  

As I mentioned in my original post, I am trying to use the -I option.  I assume I'm making a newbie error.  My makefile line is below and my entire makefile is posted above.

hellomake:  $(objects)
	$(CC) -I ../inc -o  hellomake $(objects) -static] 

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and my directory structure is:
test
   src -- all my .c and .cpp files
   inc -- my .h file

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Since I eventually plan to include libraries from folders that are not in the directory tree with my source, I'm trying to learn the general process of using includes in makefiles.  I'm working with very simple examples so that I can focus on one problem at a time.
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sarabandeCommented:
actually it isn't an issue of using includes in makefiles but that the (pre)compiler needs information where to find the header files. relative paths in statements may cause some problems because it is relative to the current directory the makefile has at the time when it calls the compile statement. normally, it would be the folder where the makefile resides. but by include statements in the makefile itself or by other initialization stuff, it could be very well, that the current folder changed, and then the compile statement fails as well.

another issue is that the relative path will be converted to an absolute path by command interpreter. if your absolute path contains spaces, it would spoil the compile command cause spaces are separators for arguments. you could overcome this issue by using double quotes for the path:

$(CC) -I "../inc" -o  hellomake $(objects) -static

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i personally would recommend to using environment variables for the root folder like

HOME=C:/myproject
...
$(CC) -I $(HOME)/inc -o  hellomake $(objects) -static 

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the environment variables also could be defined outside of the makefile. or you use include environment variable which may have a number of absolute paths, separated by ; (similar to PATH environment variable). again note, paths with spaces must be properly quoted. you would use the include environment variable for globally used include folders, for example those of 3rd-party libraries. for object folders (.a, .so, .o) the counterpart of 'include' environment variable is 'lib'.

Sara
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anAppBuilderAuthor Commented:
Thank you again, Sara.  

I must be missing some obvious newbie thing here.  

I have a very simple directory structure and I put my test directory right off D:
test
   src -- all my .c and .cpp files and my makefile
   inc -- my .h file

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 And I set up an absolute path in a variable. And it still does not find my header file.
test.zip
errors.txt
makefile.txt
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sarabandeCommented:
from your errors it is that the g++ call doesn't contain the -I option. in my opinion, the only explanation for the missing option is that the makefile you posted is not the makefile that was used when you run your test.

that could be due to your environment. unfortunately i never developed with mingw. you might check with the windows explorer whether there are other makefile files available.  normally makefiles do not have an extension and never i experienced one with .txt  file extension. you may look for makefile without extension or hellomake.mak or similar. I would assume that mingw uses another makefile and all your changes have no effect because of that.

Sara
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anAppBuilderAuthor Commented:
Thank you, Sara.  You wrote, "in my opinion, the only explanation for the missing option is that the makefile you posted is not the makefile that was used when you run your test"

That's a reasonable conclusion and fortunately also a testable one.  I did the test described below to determine that it is actually using that makefile. It is.

To test
I renamed one .c file to NEWNAME.c and made the corresponding change to the makefile in D:\test\src only
I copied the header to D:\test\src and ran the make.  Output shows the new name.  Therefore this must be the correct makefile.
I ran a clean, removed the header from /src and ran make again. It does not find the header.

Errors and files are attached.
test.zip
errors2.txt
makefile
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sarabandeCommented:
yes, but the first 3 g++ calls were made without the -I option:

g++    -c -o hellomake.o hellomake.c
g++    -c -o NEWNAME.o NEWNAME.c
g++    -c -o hellofcn2.o hellofcn2.cpp
g++ -I "D:/test"/inc -o  hellomake hellomake.o NEWNAME.o hellofcn2.o -static

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do you know that the line with $(CC) must have a <TAB> character (and only a TAB) before the $(CC) ?

it looks as if the make utility would do a default compile for all object files and finally perform the $(CC) statement. you might use an alternate way by using a rule .c.o rather than adding the cc command. or first, try to separate linking and compiling:

all: hellomake.exe

hellomake.exe: hellomake.o hellofcn2.o 
	 gcc -o hellomake.exe hellofcn2.o

hellomake.o: hellomake.c
	 gcc -c -I "../inc" hellomake.c
     
hellofcn2.o: hellofcn2.c
	 gcc -c -I "../inc" hellofcn2.c

clean:
	 rm hellomake.o hellofcn2.o hellomake.exe

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if that works, you could use "lists" like $(objects) and $(sources) and use macros for folders and flags.

see

http://www.ntu.edu.sg/home/ehchua/programming/cpp/gcc_make.html

for details.

Sara
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anAppBuilderAuthor Commented:
Thank you, Sara, for staying with this question and providing the answer.

I have included 2 makefiles
A very simple one that works on the posted c/c++ files
One using macros as shown in the reference Sara provided
makefile.txt
makefile.txt
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